Keyence KV Series Manual de usuario descargar pdf (Pagina 190)

Appendices

2-166

Appendices

B-4 Interrupt instructions

Instruction name Mnemonic Outline of process

Transfer BCD TBCD Converts content of internal register into 4-digit BCD

@TBCD data.

Transfer BIN TBIN Converts content of internal register into 16-bit binary

@TBIN data.

ASCII Convert ASC Converts content (2 digits) of lower order byte of

@ASC internal register into 2-digit ASCII code.

Reverse ASCII RASC Converts 2-digit ASCII code into 1-byte data

Convert @RASC representing 2-digit number.

Square Root ROOT Takes square root of 32-bit data (TM00: higher order

@ROOT byte, internal register: lower order byte), and inputs

result back to same internal register.

Differentiation @xxxx Executes instructions only at rising edge of input to

input relay.

Instruction name Mnemonic Outline of process

Interrupt Disabled DI Disables execution of diversified interrupt programs.

Interrupt Enabled EI Enables execution of diversified interrupt programs.

Interrupt INT Executes interrupt between INT and RETI at rising

edge of inputs 0000 to 0002.

Executes interrupts between INT and RETI at rising or

falling edge or input 0003 (Rising or falling edge can

be selected by ON/OFF of 2206). Transfers current

value up to CTH0 to TM30.

Executes interrupts up to RETI when comparison

result by comparator is matched.

Return Interrupt RETI Represents end of interrupts.

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Hesham 28 Mar 2025 | 18:51:15

Keyence KV Series Manual de usuario Pagina 190